Xcellon-Flex 4/40GE Full Emulation Load Module
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イクシアの Xcellon-Flex™ 4x40 GbE フルエミュレーションロードモジュールは、１スロットロードモジュールに業界最高密度の4 個の40 GbE QSFP+ ポートを搭載し、１台のXM12 シャーシ内で 24 ポートまで拡張することが可能です。また、豊富なレイヤ 2-7 機能を備え、手頃な価格でミッドレンジプロトコルエミュレーションとスケールテストを実施します。大規模なポート数を用いる統合データセンタースイッチのメーカーにとって、最適なロードモジュールです。 イクシアのテストアプリケーションである IxNetwork および IxLoad と連携して使用することにより、Xcellon-Flex は 40 GbEの中規模L2-L7パフォーマンステストにおいて、クラス最高レベルのコスト性能を発揮します。 特徴：
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| Features | Xcellon-Flex 4x40GbE QSFP+ Full Emulation Load |
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Load module model number |
FlexFE40G4Q |
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Number of ports per module |
4-ports of 40GE QSFP+ |
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Number of chassis slots per module |
1 |
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Maximum ports per chassis: - XM12 High Performance - XM2 Desktop |
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QSFP+ media support |
Pluggable optical transceivers Active optical fiber cables (AOC) |
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Multi-core processor technology |
Yes |
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Interface protocols |
IEEE802.3ba 40GBASE-R LAN |
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Data center protocols |
Priority-based Flow Control (IEEE 802.1Qbb) (see optional upgrades for DCBX, FCoE, FCF) |
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Layer 2-3 routing protocol emulation |
Yes |
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Layer 4-7 application traffic testing |
Yes |
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Per-port capture buffer |
256MB |
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Stream definitions per port |
256 |
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Transmit flows per port (sequential |
Billions |
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Transmit flows per port (PGID) |
1 million |
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Frame length controls |
Fixed, random, weighted random, or increment by user-defined step |
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Error generation |
CRC (good/bad/none), undersize, oversize |
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Trackable receive flows |
64K per port |
| Filters |
48-bit source/destination address, 2x128-bit user-definable pattern and offset, frame length range, CRC error, data integrity error, sequence |
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Statistics and rates |
Link state, line speed, frames sent, valid frames received, bytes sent/received, fragments, undersize, oversize, CRC errors, VLAN tagged frames, 6 user-defined stats (UDS), capture trigger (UDS 3), capture filter (UDS 4), 8 QoS counters, data integrity frames, data integrity errors, sequence checking frames, sequence checking errors, ARP, and ping requests and replies |
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Link Fault Signaling at 40 GE |
Generate local and remote faults with controls for the number of faults and order of faults, plus the ability to select the option to have the transmit port ignore link faults from a remote link partner |
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Latency measurements |
2.5ns resolution in packet timestamp |
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Intrinsic latency adjustment |
Ability for the end-user to remove inherent latency from any MSAcompliant 40GE QSFP+ transceivers without factory support |
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Transmit line clock adjustment |
Ability to adjust the parts per million (ppm) line frequency over a range of -105 to +105 ppm |
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IPv4, IPv6, UDP, TCP |
Hardware checksum generation and verification |